1. Field of the Invention
The present invention relates to manufacture of semiconductor integrated circuits and, more particularly to a method for planar deposition or etching of conductive layers.
2. Description of the Related Art
Conventional semiconductor devices generally include a semiconductor substrate, such as a silicon substrate, and a plurality of sequentially formed dielectric interlayers such as silicon dioxide and conductive paths or interconnects made of conductive materials. Copper and copper alloys have recently received considerable attention as interconnect materials because of their superior electro-migration and low resistivity characteristics. The interconnects are usually formed by filling copper in features or cavities etched into the dielectric layers by a metallization process. The preferred method of copper metallization is electroplating. In an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. Interconnects formed in sequential layers can be electrically connected using vias or contacts.
In a typical process, first an insulating layer is formed on the semiconductor substrate. Patterning and etching processes are performed to form features such as trenches and vias in the insulating layer. Then, a conductor such as copper is electroplated to fill all the features. However, the plating process results in a thick copper layer on the substrate, some of which need to be removed before the subsequent step. Conventionally, after the copper plating, CMP process is employed to globally planarize and then reduce the thickness of the copper layer down to the level of the surface of the barrier layer, which is later also removed. CMP is a costly and time consuming process that reduces production efficiency. High pressures used in the CMP processes also damage low-k dielectrics that are mechanically weaker than the silicon oxide.
The adverse effects of conventional material removal technologies may be minimized or overcome by employing an Electrochemical Mechanical Processing (ECMPR) approach that has the ability to provide thin layers of planar conductive material on the workpiece surface, or even provide a workpiece surface with no or little excess conductive material. This way, CMP process can be minimized or even eliminated. The term of Electrochemical Mechanical Processing (ECMPR) is used to include both Electrochemical Mechanical Deposition (ECMD) processes as well as Electrochemical Mechanical Etching (ECME), which is also called Electrochemical Mechanical Polishing (ECMP). It should be noted that in general both ECMD and ECME (or ECMP) processes are referred to as electrochemical mechanical processing (ECMPR) since both involve electrochemical processes and mechanical action on the workpiece surface.
Descriptions of various planar deposition and planar etching methods i.e. ECMPR approaches and apparatus, can be found in the following patents and pending applications, all commonly owned by the assignee of the present invention: U.S. Pat. Ser. No. 6,126,992 entitled “Method and Apparatus for Electrochemical Mechanical Deposition,” U.S. application Ser. No. 09/740,701 entitled “Plating Method and Apparatus that Creates a Differential Between Additive Disposed on a Top Surface and a Cavity Surface of a Workpiece Using an External Influence,” filed on Dec. 18, 2001, and U.S. application filed on Sep. 20, 2001 with Ser. No. 09/961,193 entitled “Plating Method and Apparatus for Controlling Deposition on Predetermined Portions of a Workpiece”. U.S. application with Ser. No. 09/960,236 filed on Sep. 20, 2001, entitled “Mask Plate Design,” and U.S. Provisional Application with serial No. 60/326,087 filed on Sep. 28, 2001, entitled “Low Force Electrochemical Mechanical Processing Method and Apparatus,” both assigned to the same assignee as the present invention. These methods can deposit metals in and over cavity sections on a workpiece in a planar manner.
FIG. 1 shows an exemplary ECMPR system 10, which includes a workpiece-surface-influencing device (WSID) 12 such as a mask, pad or a sweeper, a carrier head 14 holding a workpiece 16 such as a wafer, and an electrode 18. The wafer can be a silicon wafer to be plated with copper using the ECMPR system or it can be a copper plated wafer to be electro-etched using the ECMPR approach. The WSID 12 is used during at least a portion of the ECMPR when there is physical contact and relative motion between a surface 20 of the wafer 16 and the top surface 22 of the WSID 12. During ECMPR, A top surface 22 of the WSID sweeps the surface 20 of the wafer 16 while an electrical potential is established between the electrode 18 and the surface of the wafer. Alternately, in some cases potential is established right after WSID surface 22 sweeps the surface 20 of the wafer. In other words establishment of the potential and sweeping of the substrate surface by the WSID do not have to be simultaneous or continuous as described in detail in previous applications cited above. Channels 24 of the WSID allow a process solution 26 such as a copper plating electrolyte to flow to the surface of the wafer. The WSID is basically composed of a top layer 28, which is preferably made of a flexible film, and a compressible layer 30 that is made of a spongy or otherwise compressible material. The top layer 28 and the compressible layer 30 may themselves be composite layers, i.e. they may consist of one or more layers of different materials. The top layer 28 may be an abrasive film. The WSID is supported by a rigid support plate 32 which is porous, or otherwise has set of openings to direct the process solution towards the surface of the workpiece surface through the WSID structure.
If the ECMD process is carried out to plate a conductor such as copper onto the wafer in the ECMPR system of FIG. 1, the surface of the wafer is wetted by a deposition electrolyte which is also in fluid contact with an electrode (in this case an anode), such as electrode 18 shown in FIG. 1, and a potential is applied between the surface of the wafer and the electrode rendering the wafer surface cathodic. If the ECME process is carried out, the surface of the wafer is wetted by the deposition electrolyte or a special etching electrolyte, which is also in fluid contact with an electrode (this time the cathode) and a potential is applied between the surface of the wafer and the electrode rendering the wafer surface anodic. Thus etching takes place from the wafer surface.
The ECMPR systems are capable of performing planar or non-planar plating as well as planar or non-planar electro-etching. If non-planar process approach is chosen, the front surface of a wafer is brought near the top flexible layer of the WSID, but it does not touch it, so that non-planar metal deposition can be performed. Further, if planar process approach is chosen, the front surface of the wafer contacts the top flexible layer, at least during a portion of the process period, as a relative motion is established between the top layer and the wafer surface. As an electrolyte solution is delivered through the channels of the WSID, the wafer is moved, i.e., rotated and preferably also laterally moved, while the front surface contacts the flexible layer. Under an applied potential between the wafer and an electrode, and in the presence of the process solution, the metal such as copper, is plated on or etched off the front surface of the wafer depending on the polarity of the voltage applied between the wafer surface and the electrode. During the process, the wafer surface is pushed against the surface of the WSID or vice versa at a pressure range of about 0.1–2 psi, preferably at a range of 0.1–1 psi, at least part of the time when the surface of the workpiece is swept by the WSID. Planar deposition is achieved due to this sweeping action as described in the above-cited patent applications. It should be noted that even higher pressures may be applied to the substrate surface by the WSID in applications where high stress does not cause damage on the surface of the substrate. It should also be noted that although the invention is described as it is applied to manufacturing of interconnects on wafers, it is applicable to all cases where cavities on a substrate is filled with a planar conductor material. Although a specific WSID structure is given to describe the invention, the invention is applicable to any WSID design or structure as long as the WSID is used to contact the workpiece surface during at least some portion of the deposition or etching process.
The amount of force that is applied on the wafer during ECMPR affects the characteristics of the deposited layer. This physical contact needs to be uniform and repeatable for best results. For example, during planar deposition of copper layers, if the wafer is pushed against the top flexible layer, the force on the wafer is increased as the compressible layer is compressed more and more toward the support layer. For many compressible layer materials, the force exerted onto the wafer surface increases roughly linearly as the wafer is pushed into the WSID from a ‘zero-touch’ position in which the wafer surface just touches the WSID surface. For example, for a selected compressible layer material with certain spring constant, pushing the wafer into the WSID by 0.5 mm may apply an average force of 0.3 psi onto the wafer surface. Increasing the pushing distance to 1 mm may increase the force to approximately 0.6 psi. For other materials this relationship may not be linear but it may show a sub-linear or super-linear behavior. In any case, it can be appreciated from the above discussion that the stability of the ECMPR over hundreds or thousands of wafers may require a knowledge of the “zero-touch” position, the amount of push or displacement by the wafer surface into the WSID, or the force applied onto the wafer surface.
Conventionally, the touch position is determined during the set-up of the ECMPR equipment after installation of a new WSID or any time a change is made in the set-up that may have affected the zero-touch position. The touch position can be determined, for example, by placing a thin (typically 2–4 mils thick) sheet between the wafer surface and the WSID. The gap between the wafer surface and the WSID is then gradually reduced through commands to the z-motion controller and z-motion motor typically at 0.1 mm increments. As the wafer surface is brought closer and closer to the WSID surface the thin sheet in between the two surfaces is continually moved. When the zero-touch position is reached the sheet cannot be easily moved any more indicating that the WSID surface is pushed against the wafer surface. This procedure is time consuming and not necessarily accurate.
Once the zero-touch position is determined and recorded, the ECMPR recipe then commands a vertical, or z-motion, controller of the wafer holder 14 to push the wafer into the WSID during the process, by a fixed amount relative to this recorded zero-touch value, the amount of displacement corresponding to the desired level of force on the wafer surface. For example, zero-touch position may correspond to a reading of 30.55 mm (a position that is measured with respect to a surface under the WSID of FIG. 2, for example with respect to the top of the layer 125c) on the z-position indicator. If during ECMPR, z-position controller asks the z-position motor to bring the wafer surface down to a z displacement position of 30.05 mm, this will mean that the wafer surface is pushed into the WSID by an amount of 0.5 mm which may correspond to a force of 0.5 psi depending upon the characteristics such as the spring constant of the compressible layer.
There are, however, drawbacks in this approach. For example, during processing of plurality of wafers with the same WSID, the compressible layer of the WSID may swell or shrink due to exposure to the process solutions, and this may cause the “z” position of the WSID surface to change in time from the value set during the initial set up, which in turn may result in wafer to wafer variations in zero touch position. Soaking of the compressible layer 30 in process solution for long periods of time may also change the spring constant of this layer. In other words the force applied to the wafer surface may not be the same for the same displacement or push value after the WSID is soaked in the process solution. Also, if the WSID is replaced, the height of the WSID or the distance between the WSID and the wafer surface may change due to the possible thickness variation from batch to batch of the compressible layer of the WSID. This may result in variations in zero touch positions for the wafers processed before and after the replacement. As explained above, variations in the zero touch position may result in changes in the force that is exerted on the wafers during the process. It may also cause changes in the distance between the WSID surface and the wafer surface during no-touch deposition. Furthermore, changes in the properties of the compressible layer or the top layer of the WSID may result in changes in the force applied to the wafer surface even for the same displacement of the wafer surface into the WSID structure. Such process non-uniformity is not desirable in the semiconductor industry.
To this end, there is need for an improved method and apparatus for monitoring and controlling the force applied to the surface of substrates during planar metal electrochemical mechanical deposition or electro-etching.